fpga · GitHub Topics

John the Ripper jumbo - advanced offline password cracker, which supports hundreds of hash and cipher types, and runs on many operating systems, CPUs, GPUs, and even some FPGAs

john C ripper password jtr opencl gpgpu Assembly cracker crypt hash simd openmp gpu fpga mpi

C 11.48 k

2 天前

PaddlePaddle / Paddle-Lite

#计算机科学#PaddlePaddle High Performance Deep Learning Inference Engine for Mobile and Edge (飞桨高性能深度学习端侧推理引擎）

移动深度学习神经网络 arm mdl baidu embedded mali fpga mobile-deep-learning

C++ 7.11 k

24 天前

logisim-evolution / logisim-evolution

Digital logic design tool and simulator

logisim-evolution 教学 circuit circuits digital-circuit digital-circuits simulator logic digital-logic digital-logic-design fpga timing-diagram logisim vhdl Verilog

Java 5.84 k

6 天前

LeiWang1999 / FPGA

帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目

fpga xilinx Verilog pynq

4.73 k

3 年前

open-sdr / openwifi

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

fpga ofdm 802-11 zynq Linux xilinx analog-devices mac80211 csma dma Verilog hls openwifi ad9361 sdr software-defined-radio ieee80211 wifi xilinx-fpga hardware

C 4.2 k

4 天前

enjoy-digital / litex

Build your hardware, easily!

fpga hardware system-on-chip

C 3.36 k

13 天前

SpinalHDL / VexRiscv

A FPGA friendly 32 bit RISC-V CPU implementation

RISC-V soc cpu vhdl Verilog fpga

Assembly 2.8 k

7 天前

openhwgroup / cva6

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

systemverilog-hdl cpu asic fpga rv64gc ariane RISC-V

Assembly 2.5 k

2 天前

darklife / darkriscv

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

RISC-V Verilog fpga core

Verilog 2.34 k

23 天前

jbush001 / NyuziProcessor

GPGPU microprocessor architecture

fpga gpu-computing gpu Verilog hardware microprocessor graphics processor-architecture

C 2.09 k

7 个月前

GlasgowEmbedded / glasgow

Scots Army Knife for electronics

hardware usb debugging-tool fpga

Python 2 k

4 天前

corundum / corundum

Open source FPGA-based NIC and platform for in-network compute

fpga Linux Network

Verilog 1.91 k

1 年前

SpinalHDL / SpinalHDL

Scala based HDL

Scala rtl vhdl Verilog fpga

Scala 1.8 k

2 天前

pConst / basic_verilog

Must-have verilog systemverilog modules

fpga delay debounce encoder xilinx Verilog tcl synchronizer pwm uart hls

Verilog 1.8 k

2 个月前

stnolting / neorv32

🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

RISC-V vhdl fpga soc Microcontroller processor cpu system-on-chip embedded rtos smp multi-core Verilog

VHDL 1.79 k

2 天前

FPGAwars / icestudio

#编辑器#❄️ Visual editor for open FPGA boards

editor fpga blocks Verilog ide JavaScript

JavaScript 1.78 k

5 天前

amaranth-lang / amaranth

A modern hardware definition language and toolchain based on Python

fpga Verilog

Python 1.71 k

1 个月前

analogdevicesinc / hdl

HDL libraries and projects

analog-devices Verilog fpga Hacktoberfest

Verilog 1.67 k

2 天前

olofk / serv

SERV - The SErial RISC-V CPU

Verilog fpga asic RISC-V

Verilog 1.6 k

11 天前

riscv-mcu / e203_hbirdv2

The Ultra-Low Power RISC-V Core

RISC-V fpga hummingbird nuclei soc china Verilog cpu core

Verilog 1.52 k

8 个月前