digital-logic · GitHub Topics

Digital logic design tool and simulator

logisim-evolution 教学 circuit circuits digital-circuit digital-circuits simulator logic digital-logic digital-logic-design fpga timing-diagram logisim vhdl Verilog

Java 5.85 k

6 天前

tilk / digitaljs

Teaching-focused digital circuit simulator

simulator logic-gates digital-logic

JavaScript 708

1 年前

TimRudy / ice-chips-verilog

IceChips is a library of all common discrete logic devices in Verilog

eda fpga open-hardware digital-logic

Verilog 144

7 个月前

AnuragAnalog / GateResources

#算法刷题#Here are my GATE CSE 2021 Resources

aptitude digital-logic 编程数据结构算法 compiler-design 操作系统 dbms cn 2021 Hackathon-Kit

141

4 年前

matijakevic / mcircuit

A digital logic simulator inspired by Logisim.

logisim Simulation simulator circuit digital-logic Python Qt LLVM pyside pyside6 networkx

Python 48

4 年前

Aparnaraha / Gate2024

#算法刷题#here the notes provided by the seniors who already cracked IITs as well as how much I'll cover for my exams I'll provide my notes as well. If you want you can access the course by these links also

算法 aptitude compiler-design Network 数据结构 database-management dbms digital-logic 操作系统编程 toc

5 个月前

LevKruglyak / CircuitSimulator

Simple Java application for simulating digital circuits

computer-engineering digital-logic Java

Java 31

2 年前

sabertazimi / hust-lab

#算法刷题#Labs for Computer Science: C, Assembly, Data Structure, CSAPP, HSI, MATLAB, Digital Logic, Verilog, Compilers, Operating Systems

hust lab 计算机科学算法 Assembly C 编译器 data-structrues digital-logic Verilog 函数式编程 MATLAB 操作系统

C 31

6 个月前

TimRudy / uart-verilog

A simple 8 bit UART implementation in Verilog, with tests and timing diagrams

digital-logic eda fpga open-hardware hardware-designs serialport

Verilog 30

2 年前

fcayci / vhdl-digital-design

VHDL code examples for a digital design course

vhdl fpga digital-logic

VHDL 21

5 年前

Es1chUbJyan9 / 32bit_Quine-McCluskey_and_Petrick_Method_in_C

32bit Simplifier of Boolean functions

C digital-logic logic-programming simplification

C 19

7 年前

Multimedia-Processing / Digital-Logic-Design

透過數位邏輯結合VHDL與Verilog的過程，作為從基礎數位邏輯到計算機系統結構，並實作出一顆CPU的教學書籍，希望未來可以成為教學範例檔案。目前將開發轉移到GitLab，因為可以呈現數學與MUL圖。

vhdl learn fpga Verilog systemverilog xilinx xilinx-fpga digital-logic-design digital-logic digital

Verilog 18

2 年前

2catycm / SUSTech-CS202_214-Computer_Organization-Project

This is the mirror for gitee in github for project assignment of cs202 / 214 Computer Organization course of Southern University of Science and Technology， which is to manufacture a CPU. 这是南方科技大学CS202...

cpu digital-logic mips

Verilog 15

3 年前