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集合主题趋势排行榜
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processor-architecture

Website
Wikipedia
https://static.github-zh.com/github_avatars/intel?size=40
intel / pcm

Intel® Performance Counter Monitor (Intel® PCM)

monitor-performanceprocessorperformance-monitoringenergyperformance-analysisperformance-metricsperformance-dashboardperformance-visualizationprocessor-architecturecpuxeonintelpcmpowerLinuxWindowsosxfreebsd监控performance-counters
C++ 3.02 k
10 天前
mortbopet/Ripes
https://static.github-zh.com/github_avatars/mortbopet?size=40
mortbopet / Ripes

A graphical processor simulator and assembly editor for the RISC-V ISA

riscRISC-V教学simulatorQtprocessor-architecturecpu-emulatorcomputer-architecture
C++ 2.94 k
1 个月前
https://static.github-zh.com/github_avatars/jbush001?size=40
jbush001 / NyuziProcessor

GPGPU microprocessor architecture

fpgagpu-computinggpuVeriloghardwaremicroprocessorgraphicsprocessor-architecture
C 2.09 k
7 个月前
https://static.github-zh.com/github_avatars/hlorenzi?size=40
hlorenzi / customasm

💻 An assembler for custom, user-defined instruction sets! https://hlorenzi.github.io/customasm/web/

Assemblyinstruction-setprocessor-architecturemicroprocessorbytecodebytecode-compiler编译器customizablecustomvirtual-machinevmWebAssemblyasmRust
Rust 956
21 天前
https://static.github-zh.com/github_avatars/mikeroyal?size=40
mikeroyal / RISC-V-Guide

RISC-V Guide. Learn all about the RISC-V computer architecture along with the Development Tools and Operating Systems to develop on RISC-V hardware.

RISC-Vriscv64sbcperipheralssel4computer-architectureprocessor-architecturePlatformIOhypervisoroptimizecpu-profilingsimulatorprocessorvirtualizationAndroid
Assembly 582
1 年前
https://static.github-zh.com/github_avatars/Mariotti94?size=40
Mariotti94 / WebRISC-V

WebRISC-V: A Web-Based Education-Oriented RISC-V Pipeline Simulation Environment [PHP]

riscRISC-V教学simulatorprocessor-architecturecomputer-architecturePHPpipelineAssembly
PHP 147
8 天前
https://static.github-zh.com/github_avatars/sstsimulator?size=40
sstsimulator / sst-elements

SST Architectural Simulation Components and Libraries

simulatormemoryprocessor-architectureNetworkprocessornetwork-analysiscachecache-simulatortracesystem-designhpcSimulation
C++ 96
9 天前
https://static.github-zh.com/github_avatars/jmuehlig?size=40
jmuehlig / perf-cpp

Lightweight recording and sampling of performance counters for specific code segments directly from your C++ application.

C++LibraryLinuxperfperformanceperformance-monitoringsystem-programmingperformance-analysisperformance-counterssamplingperformance-measurementperformance-metricsprocessor-architecture
C++ 67
2 天前
https://static.github-zh.com/github_avatars/tscheipel?size=40
tscheipel / HaDes-V

HaDes-V is an Open Educational Resource for learning microcontroller design. It guides you through creating a pipelined 32-bit RISC-V processor using SystemVerilog and FPGA tools. Developed by TU Graz...

c-programmingcomputer-architecturegtkwavepipelinesprocessor-architectureRISC-Vrv32isystem-verilogsystemverilogverilator
SystemVerilog 61
10 天前
https://static.github-zh.com/github_avatars/caleb531?size=40
caleb531 / cache-simulator

A processor cache simulator for the MIPS architecture

mipscachePythonprocessorprocessor-architecturesimulator
Python 39
2 个月前
https://static.github-zh.com/github_avatars/alirezakay?size=40
alirezakay / RISC-CPU

A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )

cpucpu-modelcpu-architectureprocessor-architectureisavhdl
VHDL 27
4 年前
https://static.github-zh.com/github_avatars/physical-computation?size=40
physical-computation / sunflower-embedded-system-emulator

Sunflower Full-System Hardware Emulator and Physical System Simulator for Sensor-Driven Systems. Built-in architecture modeling of Hitachi SH (j-core), RISC-V, and more.

processor-architecturecross-compilersimulatorembedded-systems模拟器network-simulatorRISC-V
C 26
5 个月前
https://static.github-zh.com/github_avatars/sdasgup3?size=40
sdasgup3 / parallel-processor-design

Super scalar Processor design

processorVerilogprocessor-architectureAssemblyflexbisonparallel-computingforwardingbranch-predictioninstruction-setopcode
Verilog 21
11 年前
https://static.github-zh.com/github_avatars/alexander-titov?size=40
alexander-titov / public

A collection of my cources, lectures, articles and presentations

lecturespresentations计算机科学computer-architecturecomputer-engineeringcpuprocessor-architecture
C++ 15
6 年前
https://static.github-zh.com/github_avatars/ShichenQiao?size=40
ShichenQiao / ECE554_SP23_FPGA_Handwriting_Recognition

Senior Design Project at UW-Madison ECE

cnnfpgahandwriting-recognitionprocessor-architecture
Verilog 15
2 年前
https://static.github-zh.com/github_avatars/Amey-Thakur?size=40
Amey-Thakur / COMPUTER-ORGANIZATION-AND-ARCHITECTURE-AND-PROCESSOR-ARCHITECTURE-LAB

CSC403: Computer Organization and Architecture [COA] & CSL403: Processor Architecture Lab [PAL] <Semester IV>

engineeringcomputer-engineering计算机科学textbooksprocessor-architecture
C 15
1 年前
https://static.github-zh.com/github_avatars/GodTamIt?size=40
GodTamIt / tomasulo-simulation

A simulation of the Tomasulo algorithm, a hardware algorithm for out-of-order scheduling and execution of computer instructions, written in C++.

hardwareSimulationprocessorprocessor-architecture
C++ 14
8 年前
https://static.github-zh.com/github_avatars/Mograsim-Team?size=40
Mograsim-Team / Mograsim

Modular Graphical Simulator for Teaching Microprogramming

tumamdteachingAssemblysimulatormodulareclipse插件processorprocessor-architecture模拟器Javaemulation
Java 12
6 个月前
https://static.github-zh.com/github_avatars/prantoamt?size=40
prantoamt / 16bit_processor_design

hardware-designsprocessorprocessor-architecturelogisimcomputer-architectureSimulationcpumipsmips-assembly
12
6 年前
https://static.github-zh.com/github_avatars/GeekAlexis?size=40
GeekAlexis / superscalar-mips

A MIPS CPU with dual-issue, out-of-order, and 5-stage pipelines

processor-architectureVerilogmips
Verilog 11
6 年前
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