GitHub 中文社区
回车: Github搜索    Shift+回车: Google搜索
论坛
排行榜
趋势
登录

©2025 GitHub中文社区论坛GitHub官网网站地图GitHub官方翻译

  • X iconGitHub on X
  • Facebook iconGitHub on Facebook
  • Linkedin iconGitHub on LinkedIn
  • YouTube iconGitHub on YouTube
  • Twitch iconGitHub on Twitch
  • TikTok iconGitHub on TikTok
  • GitHub markGitHub’s organization on GitHub
集合主题趋势排行榜
#

cpu-architecture

Website
Wikipedia
https://static.github-zh.com/github_avatars/arm-university?size=40
arm-university / Introduction-to-Computer-Architecture-Education-Kit

Gain an understanding of the fundamental topics and concepts of computer architecture including the application of these with modern Arm processors

armcomputer-architecturesarmv8computer-engineeringcortex-acpu-architectureelectrical-engineeringhardware-design
HTML 275
17 天前
https://static.github-zh.com/github_avatars/arm-university?size=40
arm-university / Fundamentals-of-System-on-Chip-Design-on-Arm-Cortex-M-Microcontrollers

A textbook on understanding system on chip design

fpgafpga-soccmsiscpu-architectureembedded-systemstrustzonesoctextbook
39
2 年前
https://static.github-zh.com/github_avatars/alirezakay?size=40
alirezakay / RISC-CPU

A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )

cpucpu-modelcpu-architectureprocessor-architectureisavhdl
VHDL 27
4 年前
https://static.github-zh.com/github_avatars/MaorAssayag?size=40
MaorAssayag / Architecture-of-CPU-projects

VHDL , ModelSIM, Quartus, FPGA, Image Processing

vhdlcpu-architecturefpga
VHDL 17
6 年前
https://static.github-zh.com/github_avatars/RossComputerGuy?size=40
RossComputerGuy / SherwoodArch

The Sherwood Architecture is a custom 64-Bit RISC based CPU architecture.

virtual-machine模拟器cpu-emulatorcpucomputer-architectureAssemblycpu-architecturearchitecture
CSS 15
7 年前
https://static.github-zh.com/github_avatars/laskarelias?size=40
laskarelias / upatras-riscv

Μια ενδεικτική υλοποίηση RISC-V επεξεργαστή και ενός υποστηρικτικού Assembler - Διπλωματική εργασία στο Τμήμα Μηχανικών Η/Υ και Πληροφορικής, Πανεπιστήμιο Πατρών / An Indicative RISC-V CPU Implementat...

RISC-VAssemblyVerilogcpu-architecture
TeX 7
4 年前
https://static.github-zh.com/github_avatars/AkhilRai28?size=40
AkhilRai28 / ALUBuilder

A Verilog project for designing an Arithmetic Logic Unit (ALU) using pre-existing logic blocks. This ALU performs fundamental operations such as addition, subtraction, and logical shifts in a CPU arch...

cpucpu-architecturehardwareVerilog
4
10 个月前
https://static.github-zh.com/github_avatars/MIPT-ILab?size=40
MIPT-ILab / MDSP

[2009 – 2012] MDSP: functional simulation of a Multimedia Digital Signal Processor

mips计算机科学cpucpu-architecturemicroarchitecture
C++ 3
7 年前
https://static.github-zh.com/github_avatars/uros-bojanic?size=40
uros-bojanic / 8-bit-computer

[Computer Engineering] Programmable 8-bit computer based on von Neumann architecture, designed and implemented from scratch in Logisim.

logisimcpu-architecture
3
3 年前
https://static.github-zh.com/github_avatars/MartinBrugnara?size=40
MartinBrugnara / archetypum

Tomasulo algorithm visualizer

可视化cpu-architecture
TypeScript 2
8 年前
https://static.github-zh.com/github_avatars/Kammann123?size=40
Kammann123 / ev21g1

General purpose processor with a RISC architecture and a five stage pipeline, implemented on a Cyclone IV FPGA using a development board

fpgacpu-architecturearchitecturecpuVerilog
Verilog 2
4 年前
https://static.github-zh.com/github_avatars/erwanregy?size=40
erwanregy / Cache-Simulation

CPU Cache Simulation using gem5

cpu-architecturePython
C 2
2 年前
https://static.github-zh.com/github_avatars/schemil053?size=40
schemil053 / ScheCPUEmulator

This is a simple CPU emulator with custom architecture

cpu-architecturecpu-emulatorJavalearning-by-doing
Java 2
1 个月前
https://static.github-zh.com/github_avatars/JimCownie?size=40
JimCownie / CpuFun

Code snippets for the CpuFun blog

aarch64编译器cpu-architecturemacOSopenmpx86-64
C++ 2
10 个月前
https://static.github-zh.com/github_avatars/eomielan?size=40
eomielan / 16-bit-RISC-machine

16-bit CPU architecture implementation and verification using SystemVerilog

systemverilogVerilogcpu-architecture
2
10 个月前
https://static.github-zh.com/github_avatars/codehasan?size=40
codehasan / MyArch

#安卓#📱 An app to view all supported ABI of the running device

Androidabicpu-architecture
Java 2
9 个月前
https://static.github-zh.com/github_avatars/amari-calipso?size=40
amari-calipso / custom-emulated-computer

A 16-bit computer architecture i made, emulated in opal

cpucpu-architecturecpu-emulatoremulation模拟器sound-processingsynthesizer
Opal 2
6 个月前
https://static.github-zh.com/github_avatars/Sayemum?size=40
Sayemum / CS261-Y86-CPU-Simulator

#编辑器#My semester-long project for CS261 - Computer Systems at James Madison University where I constructed a cpu simulator using a smaller version of x86 called y86.

Assemblycomputer-systemscpucpu-architecturedebuggingelfelf-headerTesting命令行界面gdbVimVisual Studio Code
C 1
1 年前
https://static.github-zh.com/github_avatars/ewpratten?size=40
ewpratten / Dirobium

The virtual CPU (and emulator) built for hobbyists

cpu-architectureAssembly
Python 1
7 年前
https://static.github-zh.com/github_avatars/SexySparrow?size=40
SexySparrow / RISC_V

RISC-V CPU arhitecture

RISC-VVerilogcpu-architecture
Verilog 1
4 年前
loading...