cpu-architecture · GitHub Topics

arm-university / Introduction-to-Computer-Architecture-Education-Kit

Gain an understanding of the fundamental topics and concepts of computer architecture including the application of these with modern Arm processors

arm computer-architectures armv8 computer-engineering cortex-a cpu-architecture electrical-engineering hardware-design

HTML 282

4 个月前

arm-university / Fundamentals-of-System-on-Chip-Design-on-Arm-Cortex-M-Microcontrollers

A textbook on understanding system on chip design

fpga fpga-soc cmsis cpu-architecture embedded-systems trustzone soc textbook

3 个月前

alirezakay / RISC-CPU

A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )

cpu cpu-model cpu-architecture processor-architecture isa vhdl

VHDL 29

4 年前

dannydyl / SONY-Cell-SPU-Processor

This repository contains the complete Verilog implementation and supporting tools for a cycle-accurate, dual-issue pipelined multimedia processor inspired by the Synergistic Processing Unit (SPU) of t...

computer-architecture cpu-architecture processor rtl-design simd Verilog vlsi

Verilog 18

4 个月前

MaorAssayag / Architecture-of-CPU-projects

VHDL , ModelSIM, Quartus, FPGA, Image Processing

vhdl cpu-architecture fpga

VHDL 17

7 年前

RossComputerGuy / SherwoodArch

The Sherwood Architecture is a custom 64-Bit RISC based CPU architecture.

virtual-machine 模拟器 cpu-emulator cpu computer-architecture Assembly cpu-architecture architecture

CSS 15

7 年前

MicroOperations / PredecodeRE

Analysis of goldmont plus predecode cache logic due to it's core logic being undocumented

cpu-architecture microarchitecture

C 12

2 个月前

laskarelias / upatras-riscv

Μια ενδεικτική υλοποίηση RISC-V επεξεργαστή και ενός υποστηρικτικού Assembler - Διπλωματική εργασία στο Τμήμα Μηχανικών Η/Υ και Πληροφορικής, Πανεπιστήμιο Πατρών / An Indicative RISC-V CPU Implementat...

RISC-V Assembly Verilog cpu-architecture

TeX 7

4 年前

Awais-Asghar / Single-Cycle-RISC-V-Processor-Implemented-on-FPGA

An FPGA-based single-cycle RISC-V processor (RV32I) implemented in SystemVerilog. Project includes complete datapath and control logic with instruction memory, data memory, ALU, immediate generator, a...

computer-architecture cpu-architecture fpga RISC-V system-verilog

SystemVerilog 6

2 个月前

AkhilRai28 / ALUBuilder

A Verilog project for designing an Arithmetic Logic Unit (ALU) using pre-existing logic blocks. This ALU performs fundamental operations such as addition, subtraction, and logical shifts in a CPU arch...

cpu cpu-architecture hardware Verilog

1 年前

IceWizard7 / frostbyte-cpu

Assembler, ISA & everything else featuring the 16-Bit Minecraft Redstone CPU "Frostybte"

Assembly cpu cpu-architecture 我的世界 Python redstone

Python 4

14 天前

uros-bojanic / 8-bit-computer

[Computer Engineering] Programmable 8-bit computer based on von Neumann architecture, designed and implemented from scratch in Logisim.

logisim cpu-architecture

3 年前

MIPT-ILab / MDSP

[2009 – 2012] MDSP: functional simulation of a Multimedia Digital Signal Processor

mips 计算机科学 cpu cpu-architecture microarchitecture

C++ 3

7 年前

conneroisu / mips-cpu-design

A study in MIPS microarchitecture trade-offs. This project implements three CPU designs: a single-cycle, a hardware-scheduled multicycle, and a software-scheduled pipelined core; then documents and co...

cpu-architecture Actions hardware-acceleration hardware-designs mips mips-assembly Python vhdl

Python 3

1 个月前