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集合主题趋势排行榜
#

cpu-model

Website
Wikipedia
https://static.github-zh.com/github_avatars/pytorch?size=40
pytorch / cpuinfo

CPU INFOrmation library (x86/x86-64/ARM/ARM64, Linux/Windows/Android/macOS/iOS)

cpucpu-modelinstruction-setcpu-cachecpu-topologycpuid
C 1.09 k
5 天前
https://static.github-zh.com/github_avatars/MIPT-ILab?size=40
MIPT-ILab / mipt-mips

Cycle-accurate pre-silicon simulator of RISC-V and MIPS CPUs

mipscpucpu-cachebranch-predictioncomputer-architecturesimulatorcpu-modelriscSimulationoptimizationsRISC-Vpipeline
C++ 353
3 年前
https://static.github-zh.com/github_avatars/wkoszek?size=40
wkoszek / cpu60

Example of CPU simulation in software

cpucpu-modelsimulator教学
C 158
10 年前
https://static.github-zh.com/github_avatars/sake92?size=40
sake92 / nand2tetris

Nand2Tetris course solutions

AssemblyScala编译器cpu-model教程
Scala 72
1 年前
https://static.github-zh.com/github_avatars/wyvernSemi?size=40
wyvernSemi / riscV

Open source ISS and logic RISC-V 32 bit project

RISC-VLinuxC++embedded-systemsfpgaprocessorcpu-modelVerilog
C++ 53
13 天前
https://static.github-zh.com/github_avatars/alirezakay?size=40
alirezakay / RISC-CPU

A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )

cpucpu-modelcpu-architectureprocessor-architectureisavhdl
VHDL 27
4 年前
https://static.github-zh.com/github_avatars/education-script-projects?size=40
education-script-projects / PyCPU

Central Processing Unit Information Gathering Tool

cpucpuidcpu-model安全system-informationlinux-systemvulnerability-detection
Python 21
5 年前
https://static.github-zh.com/github_avatars/zpekic?size=40
zpekic / MicroCodeCompiler

https://hackaday.io/project/172073-microcoding-for-fpgas

fpgavhdlcpu-modelmapperstackC#Visual Studiovs2017Visual Studio Code
C# 11
1 年前
https://static.github-zh.com/github_avatars/wyvernSemi?size=40
wyvernSemi / cpu8051

Intel(R) 8051 Instruction Set Simulator

8051processorcpu-modelembeddedC
C 10
2 年前
https://static.github-zh.com/github_avatars/evanlissoos?size=40
evanlissoos / OISC

One Instruction Set Computer

microarchitecturecpu-emulatorcpu-modelSimulation
Python 10
8 年前
https://static.github-zh.com/github_avatars/wyvernSemi?size=40
wyvernSemi / mico32

LatticeMico32 instruction set simulator project

cpu-modelC++processorfpgaLinuxPythontkintergdbdebugtcp-socketserial-communicationembeddedrisc
C++ 9
7 个月前
https://static.github-zh.com/github_avatars/wyvernSemi?size=40
wyvernSemi / cpu6502

A 6502 Instruction Set Simulator

6502cpu-modelprocessor8-bitCWindowsLinux
Assembly 9
1 年前
https://static.github-zh.com/github_avatars/wyvernSemi?size=40
wyvernSemi / sparc

Sparc version 8 Instruction Set Simulator

sparcsimulatorC++V8processorcpu-model
Assembly 7
4 个月前
https://static.github-zh.com/github_avatars/leepoly?size=40
leepoly / chisel-pobu-cache

microarchitecturechisel3computer-architecturecpu-model
Verilog 7
7 年前
https://static.github-zh.com/github_avatars/vrobot?size=40
vrobot / cpu-design

8 bit cpu I designed on logisim

cpu-model8-bitlogisim
6
7 年前
https://static.github-zh.com/github_avatars/Steve-Teal?size=40
Steve-Teal / pumpkin-cpu

A small general purpose, scalable, 16-bit, 16 instruction CPU core written in VHDL

cpu-modelcpuinstruction-set
C 5
5 年前
https://static.github-zh.com/github_avatars/morris821028?size=40
morris821028 / hw-radiosity

CPU-based Radiosity: Final Team Project., testing - optimization & parallel skill

webglcomputer-graphicsparallel-computingcpu-model
C++ 3
8 年前
https://static.github-zh.com/github_avatars/MIPT-ILab?size=40
MIPT-ILab / PipelineFlowchartVis

MIPT-V Pipeline Flowchart Visualizer

simulatorcpupipelinemipsSimulationcpu-cacheoptimizationscomputer-architecturerisccpu-modelRISC-Vbranch-predictioncycle-accurate
CSS 2
3 年前
https://static.github-zh.com/github_avatars/Sh-Zh-7?size=40
Sh-Zh-7 / tiny-CPU

Tiny series: A handwritten CPU of MIPS instruction set.

cpu-model
Verilog 2
5 年前
https://static.github-zh.com/github_avatars/Ismael-K?size=40
Ismael-K / VHDL

vhdlcomputercomputer-architecturecomputer-engineeringTesting软件工程cpu-modelembedded-systems
C 2
7 年前
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