fpga-soc · GitHub Topics

An Open-source FPGA IP Generator

Verilog 917

3 天前

NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.

systemverilog mips fpga-soc cpu fpga xilinx

SystemVerilog 602

5 年前

JunningWu / Learning-NVDLA-Notes

#计算机科学#NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and try. Hope THIS PAGE may Helps you a bit. Contact Me:junning.wu...

Linux 深度学习 nerual-network Verilog fpga-soc

226

6 年前

dpretet / axi-crossbar

An AXI4 crossbar implementation in SystemVerilog

fpga fpga-soc processor asic soc arm Verilog RISC-V riscv64

SystemVerilog 157

1 个月前

timvideos / HDMI2USB-litex-firmware

A version of the HDMI2USB firmware based around LiteX tools produced by @Enjoy-Digital (based on misoc+migen created by @M-Labs)

hdmi2usb hardware Verilog fpga fpga-soc Video video-capture webcam hdmi usb uvc

Python 147

5 年前

ZipCPU / openarty

An Open Source configuration of the Arty platform

fpga fpga-soc verilator

Verilog 130

1 年前

ultraembedded / riscv_soc

Basic RISC-V Test SoC

RISC-V system-on-chip Verilog systemc fpga-soc Linux

Verilog 127

6 年前

azonenberg / antikernel

The Antikernel operating system project

security-hardening 操作系统 research-project system-on-chip fpga-soc fpga

Verilog 121

5 年前

splinedrive / lets_build_a_compiler_for_riscv

A c/RISCV of "Let's Build a Compiler" by Jack Crenshaw

compiler-construction RISC-V 教程编译器 C 计算机科学 fpga-soc

C 113

3 年前

esa-tu-darmstadt / tapasco

The Task Parallel System Composer (TaPaSCo)

hardware-acceleration hardware fpga fpga-soc

Verilog 108

1 个月前

trivialmips / TrivialMIPS

MIPS32 CPU implemented in SystemVerilog, with superscalar and FPU support

systemverilog mips fpga xilinx cpu fpga-soc

SystemVerilog 106

6 年前

strath-sdr / rfsoc_qpsk

PYNQ example of using the RFSoC as a QPSK transceiver.

sdr fpga-soc pynq

VHDL 103

2 年前

michaelehab / AES-Verilog

#安全#Advanced encryption standard (AES128, AES192, AES256) Encryption and Decryption Implementation in Verilog HDL

aes aes-128 aes-256 aes-encryption Cryptography fpga fpga-soc rtl Verilog encryption encryption-decryption 安全 learn

Verilog 98

3 年前

tommythorn / yarvi

Yet Another RISC-V Implementation

RISC-V fpga fpga-soc Verilog

Roff 93

9 个月前

Obijuan / Z80-FPGA

Z80 CPU for OpenFPGAs, with Icestudio

z80 fpga fpga-soc ice40

Assembly 81

1 年前

strath-sdr / rfsoc_sam

RFSoC Spectrum Analyser Module on PYNQ.

sdr pynq fpga-soc fft

VHDL 78

1 年前

jingpu / Halide-HLS

HLS branch of Halide

halide fpga hls 图像处理 dsl fpga-soc

C++ 77

7 年前

ryuz / jelly

Original FPGA platform

fpga fpga-soc Verilog zynq embedded-rust

Verilog 66

6 天前

micro-FPGA / engine-V

SoftCPU/SoC engine-V

RISC-V fpga fpga-soc

Verilog 54

3 个月前

tommythorn / fpgammix

Partial implementation of Knuth's MMIX processor (FPGA softcore)

fpga fpga-soc

C 52

2 个月前