skywater · GitHub Topics

google / skywater-pdk

Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

eda openroad openram asic asic-library skywater pdk magic

Python 3.18 k

8 个月前

The-OpenROAD-Project / OpenLane

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

asic magic yosys openroad skywater openram vlsi system-on-chip foundry rtl Verilog

Python 1.51 k

4 个月前

SparcLab / OpenSERDES

Digitally synthesizable architecture for SerDes using Skywater Open PDK 130 nm technology.

skywater

Verilog 162

3 年前

google / sky90fd-pdk

asic eda magic silicon skywater spice

111

2 年前

google / open-source-pdks

Index of the fully open source process design kits (PDKs) maintained by Google.

asic eda openroad pdk silicon skywater

3 年前

google / skywater-pdk-libs-sky130_fd_pr_reram

SKY130 ReRAM and examples (SkyWater Provided)

asic eda openroad pdk silicon skywater

3 年前

w32agobot / SKY130_SAR-ADC

Fully-differential asynchronous non-binary 12-bit SAR-ADC

adc skywater

Verilog 31

2 年前

sgherbst / sky130-hello-world

Minimal SKY130 example with self-checking LVS, DRC, and PEX

eda magic skywater pdk spice

Shell 23

4 年前

stineje / sky130_cds

This repository is an open-source version of SKY130 to help facilitate use of Cadence Design System tools for use with Skywater 130 Process Design Kit

eda Verilog vlsi cadence skywater

Tcl 23

2 年前

google / skywater-pdk-actions

GitHub Actions for usage with Google's 130nm manufacturable PDK for SkyWater Technology found @ https://github.com/google/skywater-pdk

pdk skywater asic Actions digital logic-gates 持续集成 CI/CD

Python 13

4 年前

VardhanSuroshi / VLSI-ASIC-Design-Flow

This repository is dedicated to VLSI ASIC Design Flow using open-source tools! Here, we embark on a journey that starts with specifications, RTL DV, Synthesis, Physical Design, Signoff and Finally Tap...

Open Source RISC-V rtl vlsi skywater

Verilog 12

1 年前