xmindflow / WaveFormer

#计算机科学#[WACV 2024] Beyond Self-Attention: Deformable Large Kernel Attention for Medical Image Segmentation

#计算机科学#[ICCV 2023] A curated list of resources on implicit neural representations in Medical Imaging

Official code for Enhancing Medical Image Segmentation with TransCeption: A Multi-Scale Feature Fusion Approach

Distributed tracing without code changes. 🚀 Instantly monitor any application using OpenTelemetry and eBPF

Parallel Programming for FPGAs -- An open-source high-level synthesis book

RISC-V CPU with 5-stage pipeline, implemented in Verilog HDL.

Ef-RAFT: Rethinking RAFT for Efficient Optical Flow (MVIP 2024)

#计算机科学#Dynamic Frame Interpolation in Wavelet Domain (TIP 2023)

[CVPR 2023] Efficient Frequency Domain-based Transformer for High-Quality Image Deblurring

The largest collection of PyTorch image encoders / backbones. Including train, eval, inference, export scripts, and pretrained weights -- ResNet, ResNeXT, EfficientNet, NFNet, Vision Transformer (ViT)...

Verilog Implementation of an ARM LEGv8 CPU

Video Frame Interpolation Summary and Infer

RISC-V Cores, SoC platforms and SoCs

Top-Level Project for Firebox SoC, consisting of Rocket, BOOM, and peripherals (e.g. Ethernet NIC). This is the default target generator used in FireSim.