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ZipCPU / videozip

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该仓库已收录但尚未编辑。项目介绍及使用教程请前往 GitHub 阅读 README

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关于

A ZipCPU SoC for the Nexys Video board supporting video functionality

hdmi verilator Verilog GNU General Public License soc system-on-chip fpga

创建时间

2017-11-23

是否国产

否

修改时间

2024-11-13T14:32:17Z

语言

Verilog65.1%
C++25.3%
C7.4%
Makefile1.8%
Perl0.2%
PHP0.2%
其他0.01%

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