hizbi-github / AXI4_Master_Interconnect_Slave

AXI总线连接器

AMBA bus generator including AXI4, AXI3, AHB, and APB

Bus bridges and other odds and ends

Intel® NPU Acceleration Library

Transactional Verilog design and Verilator Testbench for a RISC-V TensorCore Vector co-processor for reproducible linear algebra

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

AXI Interconnect

ERP beyond your fridge - Grocy is a web-based self-hosted groceries & household management solution for your home

Generic AXI interconnect fabric

#安全#Free Zip / Unzip software and Rar file extractor. Cross-platform file and archive manager. Features volume spanning, compression, authenticated encryption. Supports 7Z, 7-Zip sfx, ACE, ARJ, Brotli, BZ...